Noise reduction system



March 26, 1940. J GELZER 2,194,499

NOISE REDUCTION SYSTEM Filed July 25, 1936 2 Sheets-Sheet 1 Jmaentor John R.Gelzer f 7% (Ittorucg March 26, 1940. J. R. GELZER NOISE REDUCTION SYSTEM Filed July 25, 1936 2 Sheets-Sheet 2 Zhwentor e]ohnR.GeZzer y: attorney v as the limiter diode. These diodes are prothe limiter vdiode l5 (Figs. 1 to 3) until impulses 55 Patented Mar. 26, 1 940 t v f I NOISE REDUCTION srsrnm John R. Gelzer, Haddonfield, N. J., assigno'r to Radio Corporation of America; a corporation'of Delaware a ApplicationJuly 25, 1936, Serial No. 92,545 Y Claims. (01. 250-20) h I This invention relates to the reduction of the vided' with terminals l6 and ll between which UNITED STATES noise likely to be produced in radio receivers and a. bias or delay voltage Es may be applied; similar apparatus by electrical impulses extrane- AS will be readily understood, the current flowous to thesignal, and has for its principal object g through th re Q is dependent 'both 1 5v the provision of an improved apparatus and n the 'ampl tud ft s da y volta e and '5 method of operation whereby the signal chan- On the potential Es. Thus if Eiiis zero and the nel transmitting efficiency is controlled in a manna s "5 a d "a e short Circuited, alternate nor to limit or preclude the passage of impulses alf cycles of the signal wave are transmitted; likely to produce undesired n ise 7 through the resistor If! in opposite directions 10 The present invention is similar in some rend their resultant is zero. If the voltage Ed 10 spects to that disclosed by a British Patent No. s m de equal to twice the carrier ampli ud i 185,133 of Scott-Taggart b t diff r therefrom howevenno current is transmitted by the-limin that it makes available an improved means iter diode l5 so long as" 100% modulation is not for balancing out or limiting received impulses exceeded e detectordiode performs the of relativel'ylhigh amplitude s t qm usual functions of a detector. Greater ampli 15 eifieally, the signal channel is provided with. a tudes cause the limiter diode IE to supply to" the pair of reversely connected diode detectors one resistor l2 a b l n r W h limits th of which is subjected to a delay or bias potenpotential P resistor 1 to a Value P tial which varies in accordance with the signal determined by the delay voltage Ed. Itwill, of 50 level. Under these conditions, one of the diodes course; be understood that establishment f the functionsin a rm d manner t t t ignal properrelation'between Ed and the carrier am: pulses of normal amplitude and the other retude wi l pr du the sameaction at a y s versely connected diode functions in response to leeteddesired Percent modulationrelatively high level impulses to produce a bale circ 2 is Similar to h Of 1 35 ancing potential whereby the tran i i of in some respectsbut difiers therefromin that 2.5

such impulses through the channel i i t the limiter diode l5 and the delay potential Ed or prevented, As hereinafter explained the com are connectedin shunt to the resistor 12. With nectionsbetween the signal channel and the rethese connections, the diode functions to limit versely nn ct d di d may assume various the potential drop of the resistor It to a value v forms. determined by the magnitude of Ed. 30

The invention will be better understood fro n the arrangement f F the wo diodes the following description when considered-in cons and 5 are fed 180 outof phase. The operanection with the accompanying drawings and its tion of this arrangement is Similar to that of scope is indicated by the appended l i the arrangement of Fig. 1 and will, therefore, Referring to the drawings: be readily de 3 Figs. 1 to 3 are wiring diagrams illustrating Circuit of 4 y be utilized to p different connections of the reversely connected duce the delay Voltage E of thediode T i diod d te t r circuit includes the tuned primary winding in Fig. 4 i Wiring diagram. f the circuit and a detector or rectifier amplifier l8 which through which the delay Voltage of t limiter may be a Type 75 RCA Radiotron tube. It'will 40 detector i produced be observed that the high potential side of the Fig. 5 illustrates the application of the limiter ry i u "1 s connected ro g apa cir uit of Fig. 1 to a radio receiver, and itors l9 and 20 respectively to the diodes 2i and Figs. 6 and '7 are explanatory diagrams relatthat a" resistor 23 is connected in shunt to ing to the operation of the radio receiver illusdiode that an automatic-1 vo Control 45 trated by Fig. 5. v terminal 24 is connected to the diode 22 and Thelimiter circuit of .Fig. 1 includes an interthat bias resistors 25 and 26 are connected in mediate frequency transformer provided with a the cathode lead of the detector amplifier l8. tuned primary circuit l0 and with a tuned sec- With these connections, the voltageEd appearondary circuit II in which are connected a reing between the terminals l6 and His dependent sister, [2 and a pair of revers'ely connected diodes on or directly proportional to the amplitude of M and I5. Hereinafter the diode l4 will be the signal, and, as hereinafterv explained, may designated as the detectordiode and the diode be used to prevent the now of current through of a relatively high level are supplied to the channel.

Theradio receiver circuit of Fig. 5 is shown only in order to facilitate an understanding of erally by the reference numeral 33."

The character of the impulses received at the antenna 2? may be as indicated by Fig.- 6 memes the desired signal modulation impulses 'are in,-,

dicated by the wave 3 3 and the undesired or noise modulation impulses are indicatedat 35. These impulses are: amplified and detected in the usual manner until they reach the inter: mediate frequency coupling transformer ill-4 I.

Since the secondary of this transformer is loaded by a resistor 36 so that a primary to secondary Voltage ratio of two to oneis realized and the diodes 2i and 22 are fed from the primary side of the transformer, the bias diode 2i and the automatic volume diode 22 tare'subjected to a voltage greater'than that applied to the re-- verselyconnected detector diode M and the"lim-. iter diode l5.- 3 I r The circuits of the diodes 2! and 22 may be traced from the high voltage side of the primary 10 through the diodes; and the bias resistors 25 and'fifi to ground and from ground through a capacitor 31 to the low voltage side of the -pri-'; mary H1. The circuit of the diode l4 may be traced from the high voltage side of the second'ary I I through the diode, conductors 38 and 1 39, and the volume control resistor IZ'to the low voltage side of the secondary "winding. Connected in circuit with the limiter diode I5 are resistors 4i and 42' and capacitors a3 and 44 which function to filter the limiter bias potential Ea appearing at the terminals'of the resistor 23 as a result of its connection in shunt to the diode 2|. The circuit of the limiter'diode; 55 may be traced from the high voltage side of thesecondary l i through the diode, the resistors ll, 42 and 23, the conductors 38 and 39 and the volume control resistor I 2 to the low side of the secondary H. I5 supply current to the same resistor it in opposite directions, it is apparent that impulsesof an amplitude exceeding a value dependent on the voltage drop of Ed of the resistor 23 are balanced or limited as indicated by the curves 3A and 35 of Fig. 7. l

I claim as my invention: 1. A signal channel including a transformer provided with primary and secondary circuits,

output impedance device, a pair of signal detectors reversely connected to said secondary cir cuit in parallel through said first named impecl-' ance device, said second rectifier outputimpedance being included serially in circuit with only one of said detectors, and means connected to said primary circuit for producing a delay potential in said second rectifier. output imped ance device in response to received signals.

l8 and an audio frequency amplifier- 32.- Power for operating the channel derived through,

a rectifying and filtering- ,unit designatedi genf Since the reversely connected diodes Hi and 2. A signal channel including a transformer provided with primary and secondary circuits, an amplifier provided with input and output circuits, a rectifier output impedance .device con nected in-said input circuit, a second rectifier output impedance device, a pair of signal'detectors reversely connected to said secondary circuit in parallel through said first named impedancedevice, said. second rectifier output impedance being included serially in circuit with only one 1, 0isaid detectors, and means including a rectifier interposed between said primary circuit and said second rectifier output impedance device, 'for. r

derivingapotentialfor delaying the action of saidone of said detectors in response to received signals. 9

3. A signal channel including a transformer provided with primary and secondary circuits, an

amplifierl-providedwith input and output circuits, a rectifier output impedance device connected in said input circuit, -a second rectifier output impedance device, a pair of signal detectors reversely connected to said secondary circuitin parallel through said first named impedance devicej'said second rectifier output impedance being included serially in circuit with only one of said-detectors, and means connected to said primary circuit for producing'a delay potential in said second rectifier output impedance device, and a loading resistor connected in shunt to said secondary circuit.

a 4. In a modulated signal amplifying system, the combination of means for rectifying an amplified signal including a rectifier device having an output resistor, a pair of diode' rectifiers, a signal amplifier coupling transformer provided in connection with said rectifier device and diode rectifiers having a primary for supplying, signals to said rectifier device and a secondary -for'sup:- G

plying signals to said diode rectifiers,'means providing a resistance load across the secondary of, the transformer, means providing a common output resistor for said diode rectifiers, means including a signal input circuit for applying sig-' nals to said rectifiers through said last named resistor in opposing parallel relation to each other, means for deriving a biasing potential from the first named resistor, and means for applying said potential serially in circuit with only one of said diode rectifiers to providea delayed rectifier action, whereby a signal output voltage is provided across said common output resistor in response to signals below a predetermined amplitude.

5. In a modulated signal amplifying system, the combination of a pair of diode rectifier devices, each having a cathode and an anode electrode, means for applying modulated signals to said rectifiers in parallel opposingv relation to;

each other, the cathode of one rectifier being connected to the anode of the other, means providing a rectified signal voltage between the -1 cathode of one rectifier and the anode of the other, means providinga common output resistor circuit for said rectifiers, means for deriving at least a portion of the modulation component of an amplified signal from said circuit, said first named means including a tunable secondary circuit for a signal coupling transformer, and said second named means including a primary circuit the combination of means for rectifying an amplified signal including a rectifier device having .a signal input circuit and. an output resistor, a pair of diode rectifiers, means providing a common output resistor therefor, means including a second signal input circuit for applying signals to said rectifiers through said last named resistor in opposing parallel relation to each other, means for applying a signal to said input circuits in a predetermined voltage ratio, means for deriving a biasing potential from the first named resistor,

and means for applying said potential serially in circuit with only one of said diode rectifiers to provide a delayed rectifier action, whereby a signal output voltage is provided across said common output resistor in response to signals below a predetermined amplitude.

'7. In a modulated signal amplifying system,

sistor in opposing parallel relation to each other, the signal voltage applied to the first named input circuit being higher than that applied to the second named input circuit, means for deriving a biasing potential from'the first named resistor,

and means for applying said potential serially in a circuit with only one ofv said diode rectifiers to provide a delayed rectifier action, whereby a signal output voltage is provided. across said common output resistor in response to signals below a predetermined amplitude.

8. In a modulated signal. amplifying system,

the combination of means for rectifying an amplified signal including a rectifier device having a signal input circuit and an output resistor,

a pair of diode rectifiers, means providing a common output resistor therefor, meansincluding a second signal input ,circuit for applying signals to said rectifiers through 'said last named resistor in opposing parallel relation to each other, mean for applying a signal to said input circuits in a predetermined voltage ratio, a second rectifier device connected with the first named input circuit, and an automatic volume control circuit connected with said last named rectifier device to receive controlling potentials therefrom, means for deriving a biasing potential irom the first named resistor, and means for applying said potential serially in circuit with only one of said diode rectifiers to provide a delayed rectifier action, whereby a signal output voltage is provided across said common output resistor in response to signals below a predetermined amplitude.

9. A signal channel including an amplifier provided with input and output circuits, an impedance device connected in said input circuit, av second input circuit, a pair of detectors for rectifying signals :from'said channel in opposition, reversely connected to said channel through said second input circuit and said impedance device, and means including a rectifier energized from said channel for subjecting only one of said detectors to a delaypotential having a value dependent upon the carrier wave strength, and means for determining the ratio of the carrier wave level at said detectors with respect to that second input circuit and said impedance device,

and means'including a rectifier energized from said channel for subjecting only one of said detectors to a delay potential having a value dependent upon the carrier Wave strength, and means for maintaining the ratio of the carrier wave level at said detectors with respect to that at said last named rectifier in a 1:2 ratio.

JOHN R. GELZER. 

